Enzyme-free and DNA-based universal platform for the construction of various logic devices based on graphene oxide and G-quadruplex

In the fields of biocomputing and biomolecular, DNA molecules are applicable to be regarded as data of logical computing platform that uses elaborate logic gates to perform a variety of tasks. Graphene oxide (GO) is a type of novel nanomaterial, which brings new research focus to materials science and biosensors due to its special selectivity and excellent quenching ability. G-quadruplex as a unique DNA structure stimulates the intelligent application of DNA assembly on the strength of its exceptional binding activity. In this paper, we report a universal logic device assisted with GO and G-quadruplex under an enzyme-free condition. Integrated with the quenching ability of GO to the TAMRA (fluorophore, Carboxytetramethylrhodamine) and the enhancement of fluorescence intensity produced by the peculiar binding of G-quadruplex to the NMM (N-methylmesoporphyrin IX), a series of basic binary logic gates (AND. OR. INHIBIT. XOR) have been designed and verified through biological experiments. Given the modularity and programmability of this strategy, two advanced logic gates (half adder and half subtractor) were realized on the basis of the same work platform. The fluorescence signals generated from different input combinations possessed satisfactory results, which provided proof of feasibility. We believe that the proposed universal logical platform that operates at the nanoscale is expected to be utilized for future applications in molecular computing as well as disease diagnosis.     

基于卷绕型带状线的感应电压叠加器的初步实验

 提出了一种基于卷绕型带状线和感应电压叠加器的重复频率脉冲电子束加速器的技术方案。介绍了一台感应电压叠加器感应单元的结构设计,并建立相应的电路模型,对其响应特性进行了模拟研究。介绍了卷绕型带状线的设计原理,制作了一台输出阻抗约3 Ω、脉冲宽度约230 ns的固态化卷绕型带状脉冲形成线。利用该脉冲发生器作为馈源,对感应电压叠加器感应单元的响应特性进行了实验研究,表明感应单元响应良好。对4级感应电压叠加器分别进行了单次脉冲和5 Hz重复频率的实验研究,结果表明叠加器的输出电压约为输入电压幅值的4倍,电流效率约80%,重复频率条件下,脉冲序列重复性较好。     

A novel frequency encoded all optical CNOT gate exploiting difference frequency generation and implementation of fast binary adders using frequency encoding and nonlinear dielectric films

Optics has an important role in logic implementation and computation is established in two and half decades by many researchers. Recently frequency encoding technique is established. This technique does not suffer from intensity dependent loss problems like other schemes. Amorphous dielectric thin films with reflecting edges can also be used for logic realization and has very fast response speed. It also does not use any semiconductor device and simple to construct. In this communication the authors have proposed all optical CNOT gate using frequency encoded difference frequency generation exploiting nonlinear response of some material and implementation of binary adders by CNOT gate and dielectric thin film AND gate.     

基于线计算的全加器设计

随着集成电路特征尺寸的不断缩小, 互连线在芯片内部占的比重越来越大, 但是互连线仅用于数据传输, 芯片计算能力仍然需要依靠晶体管开关实现. 如何在有限的硬件资源内进一步提高芯片的计算能力, 已经成为当前集成电路设计的核心问题. 本文通过研究金属互连线间电容耦合效应, 采用互连线串扰现象完成逻辑运算的思想, 提出一种基于线计算的全加器设计方案. 该方案首先建立线计算模型, 通过调整反相器阈值和不同干扰线与受扰线之间电容耦合强度匹配技术, 采用相同线计算电路结构实现不同功能的逻辑门电路; 然后, 在逻辑门的基础上实现基于线计算的全加器; 最后, 在TSMC 65nm CMOS工艺下仿真验证. 结果表明, 所设计的线计算电路具有正确逻辑功能, 与传统设计方法相比, 线计算逻辑门具有更低开销, 且线计算电路具有抗逆向工程能力.     

“神龙一号”注入器研制

“神龙一号”注入器是直线感应加速器的束流源，它采用了感应叠加的高压加载方式，包括脉冲功率系统、感应腔、阴阳极杆、绝缘支撑、二极管和束流传输系统等子系统. 在研制中采用了径向绝缘支撑、对中支撑调节系统、类Pierce阴极等先进技术，以及二极管线圈内置和外径为800mm的铁氧体大环等创新. 参数测试显示，3.5MeV注入器达到了世界先进水平.     

低功耗CMOS同或门的设计

讨论了现有异或门／同或（XOR／XNOR）门的设计，指出了基于不同逻辑类型设计的门电路的优缺点．考虑到基于CMOS设计的XNOR门相对于其他逻辑门在各方面的优点，重点分析了CMOSXNOR门结构对门电路性能的影响．提出了一个新颖的CMOS同或门电路．经PSPICE仿真模拟表明，新设计在没有增加管子数的前提下，改善了门电路的性能．将新设计应用到全加器的设计中，其功耗和功耗延迟积的改进分别达到了9．9％和11．6％．     

字节全加器及其在无线电测控系统中的应用

对全加器概念进行了推广，并在此基础上给出了使用字节全加器网络的无线电抗干扰算法。通过在实际的无线电测控系统中的应用，结果表明该算法具有良好的无线电抗干扰效果。     

感应电压叠加器模块对方波脉冲的响应

为了解感应电压叠加器(IVA)对馈入脉冲的响应特性,尤其对上升前沿、平顶的影响,从理论和实验两个方面对IVA模块进行了研究。介绍了IVA的工作原理,利用集总参数方法建立了相应的电路模型,通过拉普拉斯变换分析了感应电压叠加器对方波脉冲上升前沿和平顶的响应,并在一个特定的IVA模块上进行了实验研究。选择输出阻抗约1.2Ω、脉宽约1μs的脉冲形成网络作为馈源,在匹配负载上得到的波形与输入波形在幅值、上升前沿方面达到了很好的吻合,平顶出现略微的顶降,与理论预期相一致。     

感应叠加过程行波分析和模拟

 采用变换矩阵为研究工具对感应叠加过程中行波的传播、透射、反射进行了分析，得到了和集中参数分析一致的稳定解，给出了电压随时间变化的细节。建立了3.5 MeV注入器脉冲功率源和感应叠加结构的电路模型，得到的感应腔压模拟波形和实验波形基本一致，结合行波分析法基本解释了腔压波形和Blumlein线输出波形之间较大差异的成因，阴极叠加电压的模拟也反映了实验中主脉冲后的反射波形。     

Photonic crystal-based all-optical arithmetic circuits without SOA-based switches

Various proposed optical computing devices involve nonlinear optical operation and use semiconductor optical amplifier (SOA)-based switches as fundamental elements for logic operations. Due to the nonlinear operation, these devices suffer from high power that causes problems in very large-scale optical integration. In this paper, a method is proposed to implement arithmetic operations using a photonic crystal (PhC) cell and eliminate the SOA-based switches altogether. The proposed method is employed on designing an all-optical full adder/subtractor circuit that requires only beam combiners and photonic crystal NOT gates.