Plasma enhanced atomic layer deposition of gallium oxide on crystalline silicon: demonstration of surface passivation and negative interfacial charge

Herein we report on the passivation of crystalline silicon by gallium oxide (Ga₂O₃) using oxygen plasma as the oxidizing reactant in an atomic layer deposition (ALD) process. Excess carrier lifetimes of 2.1 ms have been measured on 1.75 Ω cm p‐type silicon, from which a surface recombination current density J₀ of 7 fA cm^–2 is extracted. From high frequency capacitance‐voltage (HF CV) measurements it is shown that, as in the case of Al₂O₃, the presence of a high negative charge density Q_tot/q of up to –6.2 × 10¹² cm^–2 is one factor contributing to the passivation of silicon by Ga₂O₃. Defect densities at midgap on the order of ～5 × 10¹¹ eV^–1 cm^–2 are extracted from the HF CV data on samples annealed at 300 °C for 30 minutes in a H₂/Ar ambient, representing an order of magnitude reduction in the defect density compared to pre‐anneal data. Passivation of a boron‐diffused p⁺ surface (96 Ω/□) is also demonstrated, resulting in a J₀ of 52 fA cm^–2. (© 2015 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

Enhanced rear‐side reflection and firing‐stable surface passivation of silicon solar cells with capping polymer films

Low refractive index polymer materials have been investigated with a view to form the back surface mirror of advanced silicon solar cells. SiO_x:H or AlO_y SiO_x:H polymer films were spun on top of an ultra‐thin (<10 nm) atomic‐layer‐deposited (ALD) Al₂O₃ layer, itself deposited on low‐resistivity (1 Ω cm) p‐type crystalline silicon wafers. These double‐layer stacks were compared to both ALD Al₂O₃ single layers and ALD Al₂O₃/plasma‐enhanced chemical vapour deposited (PECVD) SiN_x stacks, in terms of surface passivation, firing stability and rear‐side reflection. Very low surface recombination velocity (SRV) values approaching 3 cm/s were achieved with ALD Al₂O₃ layers in the 4–8 nm range. Whilst the surface passivation of the single ALD Al₂O₃ layer is maintained after a standard firing step typical of screen printing metallisation, a harsher firing regime revealed an enhanced thermal stability of the ALD Al₂O₃/SiO_x:H and ALD Al₂O₃/AlO_y SiO_x:H stacks. Using simple two‐dimensional optical modelling of rear‐side reflection it is shown that the low refractive index exhibited by SiO_x:H and AlO_y SiO_x:H results in superior optical performance as compared to PECVD SiN_x, with gains in photogenerated current of ～0.125 mA/cm² at a capping thickness of 100 nm. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Surface passivation of phosphorus‐diffused n+‐type emitters by plasma‐assisted atomic‐layer deposited Al2O3

In recent years Al₂O₃ has received tremendous interest in the photovoltaic community for the application as surface passivation layer for crystalline silicon. Especially p‐type c‐Si surfaces are very effectively passivated by Al₂O₃, including p‐type emitters, due to the high fixed negative charge in the Al₂O₃ film. In this Letter we show that Al₂O₃ prepared by plasma‐assisted atomic layer deposition (ALD) can actually provide a good level of surface passivation for highly doped n‐type emitters in the range of 10–100 Ω/sq with implied‐V_oc values up to 680 mV. For n‐type emitters in the range of 100–200 Ω/sq the implied‐V_oc drops to a value of 600 mV for a 200 Ω/sq emitter, indicating a decreased level of surface passivation. For even lighter doped n‐type surfaces the passivation quality increases again to implied‐V_oc values well above 700 mV. Hence, the results presented here indicate that within a certain doping range, highly doped n‐ and p‐type surfaces can be passivated simultaneously by Al₂O₃. (© 2012 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Excellent Si surface passivation by low temperature SiO2 using an ultrathin Al2O3 capping film

It is demonstrated that the application of an ultrathin aluminum oxide (Al₂O₃) capping film can improve the level of silicon surface passivation obtained by low‐temperature synthesized SiO₂ profoundly. For such stacks, a very high level of surface passivation was achieved after annealing, with S_eff < 2 cm/s for 3.5 Ω cm n‐type c‐Si. This can be attributed primarily to a low interface defect density (D_it < 10¹¹ eV^–1 cm^–2). Consequently, the Al₂O₃ capping layer induced a high level of chemical passivation at the Si/SiO₂ interface. Moreover, the stacks showed an exceptional stability during high‐temperature firing processes and therefore provide a low temperature (≤400 °C) alternative to thermally‐grown SiO₂. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Temperature dependent magnetic properties and application potential of intermetallic Fe11–xCox TiCe

The novel quaternary compound Fe_11–xCo_x TiCe (x = 0 to 3.25) of Mn₁₂Th structure has been fabricated by arc melting. The analysis is focused on temperature dependent determination of intrinsic properties from 4 K to 750 K using domain pattern analysis and magnetometry. Above room temperature RT maximum values of anisotropy constant K₁ and saturation polarization J_s are observed for a Co content of 15 at% (x = 1.95) with K₁ and J_s of 2.15 MJ/m³ (1.22 MJ/m³) and 1.27 T (1.05 T) at RT (200 °C). At operating temperatures of 100 °C for this material magnetic properties (BH)_max= 282 kJ/m³, µ₀H_c = 0.94 T are expected. If a suitable microstructure could be processed, based on intrinsic properties of the phases the costs would be 35% per J/m³ of the costs of Dy‐free Fe–Nd–B. (© 2014 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

High‐performance In–Zn–O thin‐film transistors with a soluble processed ZrO2 gate insulator

Spin‐coated zirconium oxide films were used as a gate dielectric for low‐voltage, high performance indium zinc oxide (IZO) thin‐film transistors (TFTs). The ZrO₂ films annealed at 400 °C showed a low gate leakage current density of 2 × 10^–8 A/cm² at an electric field of 2 MV/cm. This was attributed to the low impurity content and high crystalline quality. Therefore, the IZO TFTs with a soluble ZrO₂ gate insulator exhibited a high field effect mobility of 23.4 cm²/V s, excellent subthreshold gate swing of 70 mV/decade and a reasonable I_on/off ratio of ～10⁶. These TFTs operated at low voltages (～3.0 V) and showed high drain current drive capability, enabling oxide TFTs with a soluble processed high‐k dielectric for use in backplane electronics for low‐power mobile display applications. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Low‐thermal budget flash light annealing for Al2O3 surface passivation

This value is achieved due to a very low interface trap density of below 10¹⁰ eV^–1 cm^–2 and a fixed charge density of (2–3) × 10¹² cm^–2. In contrast, plasma ALD‐grown Al₂O₃ layers only reach carrier lifetimes of about 1 ms. This is mainly caused by a more than 10 times higher density of interface traps, and thus, inferior chemical passivation. The strong influence of the deposition parameters is explained by the limitation of hydrogen transport in Al₂O₃ during low‐thermal budget annealing. (© 2015 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

Shallow donor in natural MoS2

Using electron paramagnetic resonance and density functional theory calculations, we show that the shallow donor responsible for the n‐type conductivity in natural MoS₂ is rhenium (Re) with a typical concentration in the low 10¹⁷ cm^–3 range and the g ‐values: g_|| = 2.0274 and g_⊥ = 2.2642. In bulk MoS₂, the valley–orbit (VO) splitting and ionization energy of the Re shallow donor are determined to be ～3 meV and ～27 meV, respectively. Calculations show that the VO splitting of Re approaches the value in bulk if the number of MoS₂ layers is larger than four and increases to 97.9 meV in a monolayer. (© 2015 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

Optical management in high‐efficiency thin‐film silicon micromorph solar cells with a silicon oxide based intermediate reflector

In the effort to increase the stable efficiency of thin film silicon micromorph solar cells, a silicon oxide based intermediate reflector (SOIR) layer is deposited in situ between the component cells of the tandem device. The effectiveness of the SOIR layer in increasing the photo‐carrier generation in the a‐Si:H top absorber is compared for p–i–n devices deposited on different rough, highly transparent, front ZnO layers. High haze and low doping level for the front ZnO strongly enhance the current density (J_sc) in the μc‐Si:H bottom cell whereas J_sc in the top cell is influenced by the angular distribution of the transmitted light and by the reflectivity of the SOIR related to different surface roughness. A total J_sc of 26.8 mA/cm² and an initial conversion efficiency of 12.6% are achieved for 1.2 cm² cells with top and bottom cell thicknesses of 300 nm and 3 μm, and without any anti‐reflective coating on the glass. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Enhancement of carrier mobility in pentacene thin-film transistor on SiO2 by controlling the initial film growth modes

Pentacene thin-film transistors (TFTs) were fabricated on thermally grown SiO₂ gate insulator under the conditions of various pre-cleaning treatments. Initial nucleation and growth of the material films on treated substrates were observed by atomic force microscope. The performance of fabricated TFT devices with different surface cleaning approaches was found to be highly related to the initial film morphologies. In contrast to the three-dimensional island-like growth mode on SiO₂ under an organic cleaning process, a layer-by-layer initial growth occurred on the SiO₂ insulator cleaned with ammonia solution, which was believed to be the origination of the excellent electrical properties of the TFT device. Field effect mobility of the TFT device could achieve as high as 1.0 cm²/Vs on the bared SiO₂/Si substrate and the on/off ratio was over 10⁶.     

Electrocaloric effect in antiferroelectric PbZrO3 thin films

Antiferroelectric PbZrO₃ thin films have been deposited on Pt(111)/Ti/SiO₂/Si substrate by polymer modified sol–gel route. Temperature dependent P –E hysteresis loops have been measured at 51 MV/m within a temperature range of 40 °C to 330 °C. The maximum electrocaloric effect ～0.224 × 10^–6 K mV^–1 has been observed near the dielectric phase transition temperature (235 °C) of the thin films. The electrocaloric effect and its strong temperature dependence have been attributed to nearly first‐order phase transition. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

High vertical breakdown strength in with low specific on‐resistance AlGaN/AlN/GaN HEMTs on silicon

Off‐state and vertical breakdown characteristics of AlGaN/AlN/GaN high‐electron‐mobility transistors (HEMTs) on high‐resistivity (HR)‐Si substrate were investigated and analysed. Three‐terminal off‐state breakdown (BV_gd) was measured as a function of gate–drain spacing (L_gd). The saturation of BV_gd with L_gd is because of increased gate leakage current. HEMTs with L_gd = 6 µm exhibited a specific on‐resistance R_DS[ON] of 0.45 mΩ cm². The figure of merit (FOM = BV_gd²/R_DS[ON]) is as high as 2.0 × 10⁸ V² Ω^–1 cm^–2, the highest among the reported values for GaN HEMTs on Si substrate. A vertical breakdown of ～1000 V was observed on 1.2 µm thick buffer GaN/AlN grown on Si substrate. The occurrence of high breakdown voltage is due to the high quality of GaN/AlN buffer layers on Si substrate with reduced threading dislocations which has been confirmed by transmission electron microscopy (TEM). This indicates that the AlGaN/AlN/GaN HEMT with 1.2 µm thick GaN/AlN buffer on Si substrate is promising candidate for high‐power and high‐speed switching device applications. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

MOVPE growth and characterization of a ‐plane AlGaN over the entire composition range

We report the metal organic vapor phase epitaxy (MOVPE) growth and characterization of non‐polar (11 0) a ‐plane Al_x Ga_1–xN on (1 02) r ‐plane sapphire substrates over the entire composition range. Al_x Ga_1–xN samples with ～0.8 μm thick layers and with x = 0, 0.18, 0.38, 0.46, 0.66, and 1.0 have been grown on r ‐plane sapphire substrates. The layer quality can be improved by using a 3‐stage AlN nucleation layer and appropriate V/III ratio switching following nucleation. All a ‐plane AlGaN epilayers show an anisotropic in‐plane mosaicity, strongly influenced by Al incorporation and growth conditions. Careful lattice parameter measurements show anisotropic in‐plane strain that results in an orthorhombic distortion of the hexagonal unit cell, making Al composition determination from X‐ray diffraction difficult. In general lower Al incorporation is seen in a ‐plane epilayers compared to c ‐plane samples grown under the same conditions. (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Role of processing in improving the critical current of Ag/BPSCCO tapes

Silver-clad tapes of highT _c Bi-Pb-Sr-Ca-Cu-O superconductors have been fabricated through the powder-in-tube method. The critical current density, J _c , of a thick tape was 534 A.cm⁻² (77 K, 0 T). Subsequent rolling and sintering of the tapes led to a gradual decrease inJ _c, instead of the expected increase. This was caused by the microcracks developed in the core material by a rather drastic reduction during the rolling of the tapes. A modified and well controlled rolling technique, on the other hand, resulted in much improvedJ _c values. Repeated rolling and sintering resulted in a good grain alignment and no microcracks were observed. In the present studies, maximumJ _c of 1846 A.cm⁻² (77 K, 0 T) and 2.43 × 10⁴ A.cm⁻² (4.2 K, 0 T) have been obtained Optimization of the processing and sintering parameters are expected to lead to still higherJ _c values.     

High‐order Stokes and anti‐Stokes Raman generation in monoisotopic CVD 12C‐diamond

We determined, for the first time, the room temperature phonon energy related to the F_2g vibration mode (ω_SRS(12C) ～ 1333.2 cm^–1) in a mono‐crystalline single‐isotope CVD ¹²C‐diamond crystal by means of stimulated Raman scattering (SRS) spectroscopy. Picosecond one‐micron excitation using a Nd³⁺:Y₃Al₅O₁₂‐laser generates a nearly two‐octave spanning SRS frequency comb (～12000 cm^–1) consisting of higher‐order Stokes and anti‐Stokes components. The spacing of the spectral lines was found to differ by Δω_SRS ～ 0.9 cm^–1 from the comb spacing (ω_SRS(natC) ～ 1332.3 cm^–1) when pumping a conventional CVD diamond crystal with a natural composition of the two stable carbon isotopes ¹²C (98.93%) and ¹³C (1.07%). (© 2016 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

The electrical properties of dielectric stacks of SiO2 and Al2O3 prepared by atomic layer deposition method

We produced dielectric stacks composed of ALD SiO₂ and ALD Al₂O₃, such as SiO₂/Al₂O₃, Al₂O₃/SiO₂, and SiO₂/Al₂O₃/SiO₂, and measured the leakage currents through the stacks in comparison with those of the single oxide layers. SiO₂/Al₂O₃ shows lowest leakage current for negative bias region below 6.4 V, and Al₂O₃/SiO₂ showed highest current under negative biases below 4.5 V. Two distinct electron conduction regimes are observed for Al₂O₃ and SiO₂/Al₂O₃. Poole-Frenkel emission is dominant at the high-voltage regime for both dielectrics, whereas the direct tunneling through the dielectric is dominant at the low-voltage regime. The calculated transition voltage between two regimes for SiO₂ (6.5 nm)/Al₂O₃ (12.6 nm) is −6.4 V, which agrees well with the experimental observation (−6.1 V). For the same EOT of entire dielectric stack, the transition voltage between two regimes decreases with thinner SiO₂ layer.     

Defect removal after low temperature annealing of boron implantations by emitter etch‐back for silicon solar cells

Ion implantation offers new possibilities for silicon solar cell production, e.g. single side doping that can be structured in‐situ with shadow masks. While phosphorus implantations can easily be annealed at low temperature, the annealing of boron implantations is challenging. In this study, we use low energy implantations of boron (1 keV and 5 keV) with a projected range of 5.6 nm and 21.2 nm that form defects causing charge carrier recombination after a low temperature anneal (950 °C, 30 min). An ozone‐based wet chemical etching step is applied to remove this near surface damage. With increasing chemical etch‐back the electrical quality (i.e. emitter saturation current density, J_0e) improves continuously. The calculated limit for J_0e was reached with an abrasion of 35 nm for 1 keV and 85 nm for 5 keV implantations, showing that the relevant defects causing charge carrier recombination are located very close to the surface, corresponding to the as‐implanted profile depth. This emitter etch‐back allows for the fabrication of defect free boron doping profiles with good sheet resistance uniformity (standard deviation <2%). With the resulting characteristics (sheet resistance <100 Ω/sq, surface doping concentration >5 × 10¹⁹ cm^–3, J_0e < 30 fA/cm²), these boron profiles are well suited for silicon solar cells. (© 2015 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

Electrical and optical characterization of SiOxNy and SiO2 dielectric layers and rear surface passivation by using SiO2/SiOxNy stack layers with screen printed local Al-BSF for c-Si solar cells

In c-Si solar cells, surface recombination velocity increases as the wafer thickness decreases due to an increase in surface to volume ratio. For high efficiency, in addition to low surface recombination velocity at the rear side, a high internal reflection from the rear surface is also required. The SiO_xN_y film with low absorbance can act as rear surface reflector. In this study, industrially feasible SiO₂/SiO_xN_y stack for rear surface passivation and screen printed local aluminium back surface field were used in the cell structure. A 3 nm thick oxide layer has resulted in low fixed oxide charge density of 1.58 × 10¹¹ cm⁻² without parasitic shunting. The oxide layer capped with SiO_xN_y layer led to surface recombination velocity of 155 cm/s after firing. Using single layer (SiO₂) rear passivation, an efficiency of 18.13% has been obtained with V_oc of 625 mV, J_sc of 36.4 mA/cm² and fill factor of 78.7%. By using double layer (SiO₂/SiO_xN_y stack) passivation at the rear side, an efficiency of 18.59% has been achieved with V_oc of 632 mV, J_sc of 37.6 mA/cm², and fill factor of 78.3%. An improved cell performance was obtained with SiO₂/SiO_xN_y rear stack passivation and local BSF.     

Mg‐doped Al0.85Ga0.15N layers grown by hot‐wall MOCVD with low resistivity at room temperature

We report on the hot‐wall MOCVD growth of Mg‐doped Al_x Ga_1–xN layers with an Al content as high as x ～ 0.85. After subjecting the layers to post‐growth in‐situ annealing in nitrogen in the growth reactor, a room temperature resistivity of 7 kΩ cm was obtained indicating an enhanced p‐type conductivity compared to published data for Al_x Ga_1–xN layers with a lower Al content of x ～ 0.70 and a room temperature resistivity of about 10 kΩ cm. It is believed that the enhanced p‐type conductivity is a result of reduced compensation by native defects through growth conditions enabled by the distinct hot‐wall MOCVD system. (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Observation of π Berry phase in quantum oscillations of three‐dimensional Fermi surface in topological insulator Bi2Se3

We report the quantum transport studies on Bi₂Se₃ single crystal with bulk carrier concentration of ～10¹⁹ cm^–3. The Bi₂Se₃ crystal exhibits metallic character, and at low temperatures, the field dependence of resistivity shows clear Shubnikov–de Haas (SdH) oscillations above 6 T. The analysis of these oscillations through Lifshitz–Kosevich theory reveals a non‐trivial π Berry phase coming from three‐dimensional (3D) Fermi surface, which is a strong signature of Dirac fermions with three‐dimensional dispersion. The large Dingle temperature and non zero slope of Williamson–Hall plot suggest the presence of enhanced local strain field in our system which possibly transforms the regions of topological insulator to 3D Dirac fermion metal state. (© 2015 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)