基于RapidIO技术的网络交换板卡的设计与实现

为了满足新的信号处理平台使用RapidIO技术来进行重构的要求,实现DSP芯片在信号处理板之间和机箱之间的动态连接配置,提出了一种基于RapidIO的网络交换板卡的设计和实现方式。板卡使用TSI578交换芯片构成RapidIO交换机,来实现信号处理板和网络交换板之间的RapidIO数据包路由交换;使用千兆以太网和光纤来实现机箱间的互连;使用FPGA芯片来实现RapidIO和千兆以太网、光纤数据之间的协议转换。应用结果表明,利用该网络交换板能够很好的实现DSP芯片在板卡间与机箱间的互连重构。     

TigerSHARC201在声纳信号处理系统中的应用

本文介绍了ADI公司最新数字信号处理器TS201的主要特点和基于TS201的VMEBus通用数字信号处理板的设计。文中较详细地分析了声纳信号处理系统的算法特点,系统的运算量和数据传输率的要求。然后给出了基于Quad-TS201 VMEBus通用数字信号处理板的具体声纳系统设计方案。该方案充分利用TS201强大的运算能力及高速数据吞吐率,以实现声纳的时空处理任务。该系统已研制成功,并在实际海上试验中得到应用。     

串口扩展芯片XR16L784在水文监测系统中的应用

为了解决系统设计中单片机串口数量较少不能同时满足多路串行通信的问题,通过对现有串口扩展技术进行对比分析,并针对水文监测系统的应用需求,提出了基于芯片XR16L784完成串口扩展的设计方案。介绍了串口扩展芯片XR16L784的硬件设计和软件编程的具体实现方法,并在水文监测系统上进行了实验验证。结果表明：串口扩展芯片XR16L784可有效实现多个串口扩充,扩充后的串口通道能够在不同波特率下稳定、可靠实现数据双向传输。串口扩展方案解决了在多路串行通信系统中系统主控单元串口数量有限的问题,在水文监测系统中体现出很好的实用价值。     

基于GTX串行收发器的高速Cameralink数字图像光纤传输

针对目前Cameralink数字图像光纤传输系统当中的不足,以实现高带宽的Cameralink-Full模式数字图像实时远距离传输为目的,对基于GTX串行收发器的数字图像光纤传输系统进行了研究;系统采用GTX串行收发器代替编解码芯片实现数据的串并转换功能,再通过数据通道的时分复用提高GTX串行收发器的传输带宽以及利用异步FIFO数据缓存处理等提高数字图像光纤传输系统的适应性。实验结果表明,GTX串行收发器的数据误码率达到10-12以下,光纤传输系统传输带宽达到4.19Gb/s。     

嵌入式网络数字带宽测量监控系统设计与实现

网络带宽表征网络传输信息的能力,是衡量网络服务质量的重要指标。为了实现对网络数字带宽测量的低成本和网络化的需求,提出了一种基于嵌入式系统的网络数字带宽测量监控系统设计与实现方法,依据以太网为基础,由带宽测量模块、采用MIC29302BU芯片为核心的电源模块,基于EEPROM芯片的网络接入模块、嵌入式网络数字监控系统自检模块以及模数转换模块组成,分析了该系统进行网络数字带宽测量的流程以及具体的实现程序代码。实验结果说明,该监控系统实现了对海量数字带宽的准确测量,并且具有较高的监控效率和精度。     

基于ARM+交换芯片的协议转换器的设计

针对目前同步串行协议通信速率低和可靠性差的现状,设计了一个基于ARM加交换芯片的协议转换器来完成同步串行协议到网络通信协议的转换。设计采用S3C2440为核心处理器,并通过服务器和客户端建立连接,以套接字的形式将SPI协议转换成TCP协议接入到以太网,采用网络调试助手和串口调试助手对客户端和服务器的协议转换通信进行测试和分析。实验结果表明服务器通过SPI总线发出的数据经过封包后构造成可以在网络上转发的报文,经过交换芯片的端口转发到达客户端完成SPI到TCP协议的转换。     

基于MAX9259/MAX9260的CameraLink图像数据光纤传输技术

为了提高光电经纬仪上图像传输系统的性能,建立了光纤传输系统,本文针对传统Camera Link光纤传输系统方案中FPGA开发繁琐的问题,结合Camera Link接口协议和串行/解串行技术,设计了一种新的base型Camera Link的光纤传输系统,该系统采用Ser Des芯片组MAX9259/MAX9260代替编解码芯片,实现数据在Cameralink并行接口与光电转换模块串行接口之间的相互转化,并通过两种实验方案验证了系统的可行性。该方案省去传统方案中时分复用及异步FIFO缓存,降低了光纤传输系统的开发难度,并缩短了研发周期。实验结果表明:系统传输速率达到2. 5 Gb/s,具有传输稳定可靠,传输图像质量好,带宽高,抗电磁干扰能力强等特点,可满足多种像素时钟相机的需求。     

基于FPGA的高速数据传输系统设计与实现

为了满足国家重点专项“量子科学实验卫星”中“量子存储板”高速串行数据传输的测试要求,提出了一种以Nios II嵌入式处理器为控制核心,TLK2711、RS422、USB2.0和千兆以太网为传输接口的高速数据传输解决方案;系统采用TLK2711完成高速数据的串并转换,采用RS422完成命令和控制信号的传输,实现与“量子存储板”的高速数据传输;利用Xilinx公司Zynq-7000芯片独有的ARM+FPGA架构实现千兆以太网完成数据的高速传输,利用EXAR公司XR21V1414 USB转串口芯片实现命令、遥测等数据的传输;采用Labview编写上位机控制整个系统的运行,实现命令发送、指令解析、运行状态显示、数据帧产生、高速数据传输、解析和存储等功能;实测结果表明,此系统数据传输速率高达600 Mbps,满足高速串行数据传输的要求,且具有稳定性高、可靠性好等优点。     

基于CPLD的多路瞬态冲击信号存储测试系统设计

为了对水平碰撞、跌落等环境试验中的多路瞬态冲击信号进行测试,基于CPLD设计了多路瞬态冲击信号嵌入式存储测试系统。系统采用高速串行AD转换芯片作为数据采集的执行器件,实现了多路冲击信号的同步高速采集;利用铁电存储器对采集到的信号进行在线存储;设计了USB接口模块,实现了PC机与测试系统之间的通信,并在LABVIEW环境下设计了数据回读软件;经试验验证了测试系统的正确性和可靠性。     

基于Nios-II用于加速器监控系统的通用型可重配置嵌入式微控制器

 讨论并参考了冷却储存环目前使用的专用微控制器的特点和其对微控制器的需求,采用可编程技术和Nios-Ⅱ处理器,在altera-cycloneII2c35f484芯片内实现可重构微控制器。该微控制器硬件资源消耗少,最大工作频率可达185 MHz,可代替目前在监控系统中大量使用的专用微控制器芯片,减小硬件设计复杂度、节约成本。     

Fiber remote configuration for an optically reconfigurable gate array with four configuration contexts

A function enabling remote programming is necessary for systems used with nuclear power plants, high-energy physics experiments, and other plants with no personnel. Recently, optically reconfigurable gate array (ORGA) architecture has been developed to achieve a huge virtual gate count that is much greater than those of currently available VLSIs. However, ORGA architectures have never supported a remote programming capability since a complicated holographic writer system is required along with an ORGA for that purpose. This paper therefore presents a proposal of a new remotely reconfigurable gate array architecture with four configuration contexts that enable remote reconfiguration using optical fiber networks. Furthermore, this paper presents discussion of the availability of this architecture and plans based on the experimental results.     

Feed forward rings

Military and other critical (life-threatening/life-saving) systems require performance evaluations from a survivability, reliability, maintainability, and availability (SRMA) perspective. Applying SRMA concepts to commercial token passing ring local area networks (LANs) (e.g., IEEE-802.5, FDDI, SAE-9B) has uncovered several design issues that could impact the utility of these networks in a critical system. This article discloses a new architecture for token passing rings, called “feed forward rings” (FFR), which provides a significant improvement in system survivability, can eliminate “jabber mode” induced ring failures, and provides for passive optical bridging between rings.

The basic “feed forward” concept is that LANs, based on token passing protocols and utilizing multiple, physically separated, fiber optic rings, should have the serial data stream on each ring flowing in the same direction of rotation. This article provides qualitative observations on the performance of current commercial rings and discusses the advantages of several FFR topologies. Implementation issues related to FFRs are also discussed. It is recommended that FFR alternatives to counterrotating rings (CRR) with separated cables be considered for inclusion in LAN standards.     

Reconfigurable MEMS OADM Systems

This paper proposes a serial reconfigurable OADM consisting of optical circulator and 2 × 2 MEMS optical switch and tunable FBG. Based on MEMS technology, the OADM is demonstrated to increase the flexibility, decrease the cost andimprove the reliability.     

Continuous and time-shared multiple optical tweezers for the study of single motor proteins

We present a comparison between continuous (CW) and time-shared (TS) multiple optical tweezers applied to the study of the interaction between a single motor protein (myosin) with its track (an actin filament). In the experimental assay, named “three-bead assay”, a single actin filament is stretched between two beads trapped in a CW or in a TS double trap. The actin filament is presented to a single myosin molecule lying on a third bead attached to the coverslide. The CW double trap is obtained by splitting a single laser source into two orthogonally polarized beams, while the TS one is obtained by rapidly scanning a single laser beam with acusto-optic modulators. When using the CW traps, position detection of the left or right bead is obtained by means of a single quadrant detector photodiode (QDP) placed in the back focal plane of the condenser and selected with a polarizer; when using the TS traps, the position of multiple traps with the same QDP can be collected independently using triggered and synchronized generation and acquisition. The two techniques are thoroughly analysed and compared, evidencing advantages and disadvantages of each one.     

多模冗余可重构计算机可靠性研究

为了以最小代价提高多模可重构计算机的可靠性，需要结合系统体积功耗等因素,对不同计算机体系结构的可靠性进行评估。首先，针对三模冗余、三热一冷以及四模热备这几种不同冗余可重构计算机体系结构，给出了他们的故障状态转移图。其次，运用马尔可夫模型理论，对这些计算机结构进行可靠性建模。第三，根据上述三种系统的可靠性模型，在考虑失效率和维修率两个参数对系统可靠性影响的情况下，对各结构的可靠性指标进行了评价。结果表明，三热一冷的可靠性大于三模冗余，而小于四模热备。但综合考虑系统的可靠度、体积、功耗等因素后，在这几种形式的表决系统中，三热一冷是最优的。同时，设计完善的三模可重构系统可靠度会比一个设计不合理的四模可重构系统要高。     

具备重构能力的三模冗余器载计算机研究

器载计算机是航天器电气系统的重要组成部分，需要冗余技术来满足其高可靠性运行要求。为了保证航天器上计算机在出现异常故障时仍能正常工作，对传统三模容错结构、具有降级功能的三模容余结构的体系结构、算法原理、关键技术等内容进行了研究。综合使用多种检测机制确保可靠锁定故障机，基于故障机无法修复时再逐步降级使用的策略，以正常工作的当班机为基础，通过故障机在每个流程的开始读取刷新后的当班机指针和重要状态参数并在流程的结束向当班机发送同步请求的方式，提出了一种具备重构能力的三模冗余器载计算机设计方案，设计了三模冗余重构流程，使故障机具备自修复的能力。实践表明，该重构方法能有效地提高器载计算机系统的可靠性，对高可靠器载计算机设计与实现具有较好的工程参考意义。     

Reconfigurable microwave photonic transversal filter using a variable gain tilt filter

A novel and simple technique to realize reconfigurable microwave photonic transversal filter is presented. In the proposed method, a multi-wavelength source and a dispersive medium are applied to achieve multiple taps; and an electro-optic ceramic material-based variable gain tilt filter (VGTF) is utilized to control the tap weights of the filter. The VGTF is computer-controlled via a universal serial bus interface, which enables real-time reconfiguration of the filter. Filter responses with different passband bandwidth and different sidelobe suppression can be achieved. Compared with previous approaches, the given method features in less optical components involved and faster response speed. A three-tap reconfigurable filter with sub-millisecond response speed is experimentally demonstrated.     

Reconfigurable mesh-based inter-chip optical interconnection network for distributed-memory multiprocessor system

A 4×4 reconfigurable mesh-based inter-chip optical interconnection network is reported for distributed-memory multiprocessor system and the experiment confirmed that the data rate in each channel could reach above 3.125 Gbps, which would be a good solution to solve the communication bottlenecks between processors. Each node of this reconfigurable mesh could realize 15 internal connection patterns to complete the interconnections of processors. Besides, this mesh interconnect network via ultra-high bandwidth waveguides embedded in EOPCB can realize flexible multiprocessor system architecture options.