Ternary Galois field arithmetic operations with optical nonlinear material (OPNLM) switch

Ternary Galois field (GF3) arithmetic can take an important and significant role in future information processing with multi-valued logic (MVL). An all optical circuit for two arithmetical operations (addition and multiplication) in ternary Galois field with OPNLM switch is proposed and discussed. The different states of polarization of light are taken as different logic states. An outline of Ternary Galois field sum of product (TGFSOP) is also discussed. Mathematical simulation has confirmed the result.     

Polarization encoded all-optical quaternary R-S flip-flop using binary latch

The developments of different multi-valued logic (MVL) systems have received considerable interests in recent years all over the world. In electronics, efforts have already been made to incorporate multi-valued system in logic and arithmetic data processing. But, very little efforts have been given in realization of MVL with optics. In this paper we present novel designs of certain all-optical circuits that can be used for realizing multi-valued logic functions. Polarization encoded all-optical quaternary (4-valued) R-S flip-flop is proposed and described. Two key circuits (all-optical encoder/decoder and a binary latch) are designed first. They are used to realize quaternary flip-flop in all-optical domain. Here the different quaternary logical states are represented by different polarized state of light. Terahertz Optical Asymmetric Demultiplexer (TOAD) based interferometric switch can take an important role. Computer simulation result confirming described methods and conclusion are given in this paper.     

Polarization-encoded all-optical quaternary multiplexer and demultiplexer - A proposal

Multi-valued logic is positioned as a coming generation technology that can execute arithmetic functions faster and with less interconnect than binary logic. Furthermore, nonbinary data storage would require less physical space than binary data. The application of multi-valued digital signals can provide considerable relief of capacity constraints. In electronics many proposals have already been reported. But, here for the first time we propose an all-optical circuit for designing quaternary (four-valued) multiplexer and demultiplexer with the help of some polarization-encoded basic quaternary logic gates (quaternary min and quaternary delta literal). Nonlinear interferometer-based optical switch can take an important role here. The principles and possibilities of design of all-optical quaternary multi-valued multiplexer and demultiplexer circuits are proposed and described.     

Polarization encoded all-optical quaternary successor with the help of SOA assisted Sagnac switch

The application of multi-valued (non-binary) signals can provide a considerable relief in transmission, storage and processing of large amount of information in digital signal processing. Optical multi-valued logical operation is an interesting challenge for future optical signal processing where we can expect much innovation. A novel all-optical quaternary successor (QSUC) circuit with the help of semiconductor optical amplifier (SOA)-assisted Sagnac switch is proposed and described. This circuit exploits the polarization properties of light. Different logical states are represented by different polarization state of light. Simulation result confirming described method is given in this paper. Proposed all-optical successor circuit can take an important and significant role in designing of all-optical quaternary universal inverter and modulo arithmetic unit (addition and multiplication).     

Polarization encoded TOAD based all-optical quaternary literals

Multi-valued logic can be viewed as an alternative approach to solving many problems in transmission, storage and processing of large amount of information in digital signal processing. For the first time to our knowledge, the principal of possibilities of design of all-optical quaternary multi-valued literals circuit (truncated sum, truncated difference and down literals) are proposed and described. Here the different quaternary logical states are represented by different polarized state of light. Terahertz optical asymmetric demultiplexer (TOAD) based interferometric switch can take an important role here. Computer simulation result (by Mathcad-7.0) confirming described methods and conclusion are given in this paper.     

All-optical quaternary circuits using quaternary T-gate

In multi-valued logic (radix>2), quaternary multiplexer (also known as T-gate) places a significant role for data transmission and signal processing. Four valued multiplexer transmit one data (from 4-input) to the output corresponding to the one selected input. Any four-valued logic can be implemented using T-gate. So it is called ‘universal’ element. In this paper some all-optical quaternary logical operations, quaternary half-adder, quaternary multiplier and quaternary comparator is proposed and described using only all-optical quaternary T-gate.     

Phase sensitive,all-optical and self-integrated multi-logic AND,OR, XOR,and NOT gates

The design and simulation of all-optical and self-integrated primary logical AND, OR, XOR and NOT gates based on phase sensitivity of spatial optical solitons have been reported. By tuning the phase of incident solitons into a bulky nonlinear Kerr medium and interaction between the phase tuned solitons, the self-integrated logical gates are achieved simultaneously in a 50 μm long distance by one setup. These are the advantages in the application and design of integrated circuits. In addition, the proposed logical gates can be cascaded and the logical AND and XOR gates can simultaneously have two outputs. The simplicity of constructing, simultaneous functions with one setup, the possibility of integrating, high sensitivity and fabrication ease are the advantages of the proposed logical gates and may be a good candidate for the future of integrated photonic computational circuits.     

Quaternary Quantum/Reversible Half-Adder,Full-Adder,Parallel Adder and Parallel Adder/Subtractor Circuits

Multiple valued quantum logic is a promising research area in quantum computing technology having several advantages over binary quantum logic. Adder circuits as well as subtractor circuits are the major components of various computational units in computers and other complex computational systems. In this paper, we propose a quaternary quantum reversible half-adder circuit using quaternary 1-qudit gates, 2-qudit Feynman and Muthukrishnan-Stroud gates. Then we propose a quaternary quantum reversible full adder and a quaternary quantum parallel adder circuit. In addition, we propose a quaternary quantum reversible parallel adder/subtractor circuit. The proposed designs are compared with existing designs and improvements in terms of hardware complexity, quantum cost, number of constant inputs and garbage outputs are reported.

     

Design of ternary Multiplexer and De-multiplexer circuit with optical nonlinear material (OPNLM) based switch

Multiplexer and De-multiplexer operation play a very important role in all-optical computation, communication and control. Considerable number of multiplexing – de-multiplexing scheme in digital optical processing have already been reported. A design of all-optical ternary Multiplexer De-multiplexer circuit with optical nonlinear material (OPNLM) based switch is proposed and described in this paper. Different logic states have been represented by different polarization states of light. Logical simulation is also included here. This circuit will be useful in future all-optical multi-valued logic based computing and information processing system.     

All-optical method of developing some fundamental and functional quaternary logic gates

All optical multivalued logic processors are of paramount importance in optical computing and signal processing. In this article the author proposes a method of developing all-optical quaternary Inversion, NOT and Bitswap logic gates, which are essential parts of quaternary arithmetic and logical processors. Nonlinear switching and add/drop multiplexing (ADM) properties of semiconductor optical amplifier (SOA) are exploited here to develop the frequency encoded quaternary logic gates.     

Circuit designs of ultra-fast all-optical modified signed-digit adders using semiconductor optical amplifier and Mach-Zehnder interferometer

The need for increasingly high-speed digital optical systems and optical processors demands ultra-fast all-optical logic and arithmetic units. In this paper, we combine the attractive and powerful parallelism property of the modified signed-digit (MSD) number representation with the ultra-fast all-optical switching property of the semiconductor optical amplifier and Mach-Zehnder interferometer (SOA-MZI) to design and implement all-optical MSD adder/subtracter circuits. Non-minimized and minimized techniques are presented to design and realize efficient circuits to perform arithmetic operations. Several all-optical circuits’ designs are proposed with the objective to minimize the number of the SOA-MZI switches, the time delay units in the adders, and other optical elements. To use the switching property of the SOA-MZI structure, two bits per digit binary encoding for each of the trinary MSD digits are used. The proposed optical circuits will be very helpful in developing hardware modules for optical digital computing processors.     

A review on the design of ternary logic circuits

A multi-valued logic system is a promising alternative to traditional binary logic because it can reduce the complexity, power consumption, and area of circuit implementation. This article briefly summarizes the development of ternary logic and its advantages in digital logic circuits. The schemes, characteristics, and application of ternary logic circuits based on CMOS, CNTFET, memristor, and other devices and processes are reviewed in this paper, providing some reference for the further research and development of ternary logic circuits.     

Mach-Zehnder interferometer-based all-optical reversible logic gate

In recent years, reversible logic has emerged as a promising computing paradigm having application in low-power CMOS, quantum computing, nanotechnology and optical computing. Optical logic gates have the potential to work at macroscopic (light pulses carry information), or quantum (single photons carry information) levels with great efficiency. However, relatively little has been published on designing reversible logic circuits in all-optical domain. In this paper, we propose and design a novel scheme of Toffoli and Feynman gates in all-optical domain. We have described their principle of operations and used a theoretical model to assist this task, finally confirming through numerical simulations. Semiconductor optical amplifier (SOA)-based Mach-Zehnder interferometer (MZI) can play a significant role in this field of ultra-fast all-optical signal processing. The all-optical reversible circuits presented in this paper will be useful to perform different arithmetic (full adder, BCD adder) and logical (realization of Boolean function) operations in the domain of reversible logic-based information processing.     

连续多阈值神经元反馈神经网络盲检测光基带信号

空间分集接收可补偿信道衰落,提出了一种基于幅相联合激励法的连续多阈值神经元反馈神经网络(RNNCMVN)的光基带信号直接盲检测方法。针对多进制相移键控(MPSK)信号的特点,设计了两种连续相位多阈值激励函数形式,并简要讨论了该两类激励函数参数的选择;分别推演基于幅相联合激励法的RNNCMVN光基带信号盲检测方法工作于同步和异步两种模式下的新能量函数及其相关证明。同时针对正交调幅(QAM)信号的特点,分别设计出连续振幅和相位多阈值激励函数形式,最后通过仿真验证了该方法的有效性。     

复数多值离散Hopfield神经网络的稳定性研究

本文提出了一个新的复数多电平离散Hopfield神经网络,构造了新的适用于复数多电平离散神经网的激活函数和能量函数,分别讨论了异步与同步更新模式下神经网的稳定性.该能量函数不仅能描述文献能量函数不适用的复数多值Hopfield神经网的动力学特性,而且能保证待盲检测信号位于能量函数的最小值点.为验证CMDHNN的有效性,利用本文特有的性能函数下所构造的联结权阵盲检测MQAM信号.仿真试验表明:本算法仅需较短接收数据就可有效盲检测MQAM星座信号,仿真也证明了CMDHNN能量函数全局最小值的稳定性推论. 关键词： 复数多电平离散Hopfield神经网络 盲检测 MQAM信号     

On the data rate extension of semiconductor optical amplifier-based ultrafast nonlinear interferometer in dual rail switching mode using a cascaded optical delay interferometer

The feasibility of increasing by a factor of two the data speed of the semiconductor optical amplifier (SOA)-based ultrafast nonlinear interferometer in dual rail switching mode by means of a cascaded optical delay interferometer (ODI) is explored and shown through numerical simulation. From the theoretical analysis it has been found that such extension cannot be done without employing this passive element for any selection of the critical parameters but the SOA carrier lifetime, for which the requirements are yet very demanding. If, however, the time delay introduced by the ODI is adjusted to almost 1/3rd of the bit period, then the result of Boolean XOR operation can be improved for a specified range of parameter values, which can be further selected to be more relaxed than is possible when the ODI is not being used. The use of the ODI allows both error-free and pattern-free performance at the output of the interferometric structure configured as ultrafast XOR gate. In this manner the scheme can offer a practical alternative solution for extending the operating rate of this logical module and enabling its exploitation as a basic building unit in more sophisticated all-optical circuits and subsystems.     

Neural-mechanism-driven image block encryption algorithm incorporating a hyperchaotic system and cloud model

An image encryption algorithm is proposed in this paper based on a new four-dimensional hyperchaotic system, a neural mechanism, a Galois field and an improved Feistel block structure, which improves the efficiency and enhances the security of the encryption algorithm. Firstly, a four-dimensional hyperchaotic system with a large key space and chaotic dynamics performance is proposed and combined with a cloud model, in which a more complex and random sequence is constructed as the key stream, and the problem of chaotic periodicity is solved. Then, the key stream is combined with the neural mechanism, Galois field and improved Feistel block structure to scramble and diffuse the image encryption. Finally, the experimental results and security analysis show that the encryption algorithm has a good encryption effect and high encryption efficiency, is secure, and can meet the requirements of practical applications.     

Computing Integrated Information (Φ) in Discrete Dynamical Systems with Multi-Valued Elements

Integrated information theory (IIT) provides a mathematical framework to characterize the cause-effect structure of a physical system and its amount of integrated information (Φ). An accompanying Python software package (“PyPhi”) was recently introduced to implement this framework for the causal analysis of discrete dynamical systems of binary elements. Here, we present an update to PyPhi that extends its applicability to systems constituted of discrete, but multi-valued elements. This allows us to analyze and compare general causal properties of random networks made up of binary, ternary, quaternary, and mixed nodes. Moreover, we apply the developed tools for causal analysis to a simple non-binary regulatory network model (p53-Mdm2) and discuss commonly used binarization methods in light of their capacity to preserve the causal structure of the original system with multi-valued elements.