Characterization of the low temperature activated N/P junction formed by implant into silicide method

Shallow junction formation and low thermal budget control are important for advanced device manufacturing. Implant into silicide (IIS) method is a candidate to achieve both requirements. In this work we show that the high activation ability of the implant into nickel silicide method at low activated temperature is strongly related to the solid phase epitaxial regrowth (SPER) process. The SIMS, capacitance-voltage (C-V), four points probe (FPP), and current-voltage (I-V) measurements are combined to demonstrate that the SPER process of the IIS method is starting from the silicide/silicon (M/S) interface. The best N⁺/P interface is formed when SPER is complete. After SPER process finished, additional thermal budget may cause junction performance degradation at the temperature higher than 550 °C.     

Investigation on the barrier height and inhomogeneity of nickel silicide Schottky

The apparent Schottky barrier height (SBH) of the nickel silicide Schottky contacts annealed at different temperatures was investigated based on temperature dependence of I-V characteristic. Thermionic emission-diffusion (TED) theory, single Gaussian and double Gaussian models were employed to fit I-V experimental data. It is found the single Gaussian and double Gaussian SB distribution model can give a very good fit to the I-V characteristic of apparent SBH for different annealing temperatures. Also, the apparent SBH and the leakage current increase with annealing temperatures under reverse voltage. In addition, the homogeneity of interfaces for the samples annealed at temperatures of 500 and 600 °C is much better than that of the samples annealed at temperatures of 400, 700, and 800 °C. This may result from the phase transformation of nickel silicide due to the different annealing temperatures and from the low Schottky barrier (SB) patches.     

Temperature dependent transport properties of CuInSe2-ZnO heterostructure solar Cell

Experimental study of dc and ac transport properties of CuInSe₂/ZnO heterostructure is presented. The current-voltage (I-V) and frequency dependent capacitance (C-f) characteristics of CuInSe₂/ZnO heterostructure were investigated in the temperature range 160-393 K. The heterostructure showed non-ideal behavior of I-V characteristics with an ideality factor of 3.0 at room temperature. Temperature dependent dc conductivity studies exhibited Arrhenius type behavior and revealed the presence of trap level. The C⁻²-V plot measured at frequency 50 kHz had shown non-linear behavior. An increase in capacitance with temperature was observed. The capacitance-frequency characteristics exhibited a transition between low frequency and the high frequency capacitance. As the temperature was lowered the transition occurred at lower frequencies. The frequency and temperature dependent device capacitance had shown a defect state having activation energy of 108 meV.     

Inhomogeneities in 130 MeV Au ion irradiated Au/n-Si (1 0 0) Schottky structure

The electrical characteristics of Au/n-Si (1 0 0) Schottky rectifier have been studied in a wide irradiation fluence range using conventional current-voltage (I-V) and capacitance-voltage (C-V) measurements. The I-V characteristics showed an abnormal increase in forward current at low voltage. The device shows a bend in forward I-V and reverses bias C-V characteristics due to extra current, suggesting that there are two independent contributions to thermionic current, corresponding to two levels of the Schottky barrier. It is shown that the excess current at low voltage can be explained by taking into account the role of heavy ion irradiation induced defects at the metal semiconductor interface.     

Effect of the oxidation process on SiO2/4H-SiC interface electrical characteristics

In this work we have compared the SiO₂/SiC interface electrical characteristics for three different oxidations processes (dry oxygen, water-containing oxygen and water-containing nitrogen atmospheres). MOS structures were fabricated on 8° off-axis 4H-SiC(0 0 0 1) n- and p-type epi-wafers. Electrical characteristics were obtained by I-V measurements, high-frequency capacitance-voltage (C-V) and ac conductance (G-ω) methods. Comparing the results, one observes remarkable differences between samples which underwent different oxidation routes. Among the MOS structures analyzed, the sample which underwent wet oxidation with oxygen as carrier gas presented the higher dielectric strength and lower values of interface states density.     

C-V analysis of rapidly thermal annealed SF6 plasma treated AlGaN/GaN heterostructures

We studied influence of rapid thermal annealing on electrical parameters of SF₆ plasma treated AlGaN/GaN heterostructures. The main emphasis by the evaluation was laid on C-V measurement and simulation, but also I-V and SIMS measurement were used. It was found that the diminished sheet carrier concentration of a two-dimensional electron gas after plasma treatment recovered significantly at the temperature of 500 °C. By using C-V measurement, it was possible to assess besides the changes of the two-dimensional electron gas concentration after annealing also the changes in the Schottky barrier heights and to find out the doping concentration in AlGaN barrier and GaN channel layer. The trend in Schottky barrier height changes after annealing was confirmed also by I-V measurement.     

The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.     

The effects of annealing on Au/pyronine-B/MD n-InP Schottky structure

Thin film of non-polymeric organic compound pyronine-B has been fabricated on moderately doped (MD) n-InP substrate as an interfacial layer using spin coating technique for the electronic modification of Au/MD n-InP Schottky contact. The electrical characteristics have been determined at room temperature. The barrier height and the ideality factor values for Au/pyronine-B/MD n-InP Schottky diode have been obtained from the forward bias I-V characteristics at room temperature as 0.60 eV and 1.041; 0.571 and 1.253 eV after annealing at 100 and 250 °C, respectively. An increase in annealing temperature at the Au/n-InP Schottky junction is shown to increase the reverse bias leakage current by about one order of magnitude and decrease the Schottky barrier height by 0.027 eV. Furthermore, the barrier height values for the Au/pyronine-B/MD n-InP Schottky diode have also been obtained from the C-V characteristics at room temperature as 1.001 and 0.709 eV after annealing at 100 and 250 °C, respectively. Finally, it was seen that the diode parameters changed with increase in the annealing temperature.     

Annealing temperature effect on the structural, optical and electrical properties of ZnS thin films

Zinc sulfide thin films were prepared on glass substrates at room temperature using a chemical bath deposition method. The obtained films were annealed at temperatures ranging from 100 to 500 °C in steps of 100 °C for 1 h. The films were characterized by X-ray diffraction (XRD), Raman spectroscopy, energy dispersive X-ray analysis (EDX), optical absorption spectra, and electrical measurements. X-ray diffraction analysis indicates that the deposited films have an amorphous structure, but after being annealed at 500 °C, they change to slightly polycrystalline. The optical constants such as the refractive index (n_r), the extinction coefficient (k), and the real (ε₁) and imaginary (ε₂) parts of the dielectric constant are calculated depending on the annealing temperature. Aside from the ohmic characteristics of the I-V curve, a nonlinear I-V curve owing to the Schottky contact is also found, and the barrier heights (?_bn) for Au/n-ZnS and In/n-ZnS heterojunctions are calculated. The conductivity type was identified by the hot-probe technique.     

Optical and electrical properties of plasma-oxidation derived HfO2 gate dielectric films

High-k gate dielectric HfO₂ thin films have been deposited on Si(1 0 0) by using plasma oxidation of sputtered metallic Hf thin films. The optical and electrical properties in relation to postdeposition annealing temperatures are investigated by spectroscopic ellipsometry (SE) and capacitance-voltage (C-V) characteristics in detail. X-ray diffraction (XRD) measurement shows that the as-deposited HfO₂ films are basically amorphous. Based on a parameterized Tauc-Lorentz dispersion mode, excellent agreement has been found between the experimental and the simulated spectra, and the optical constants of the as-deposited and annealed films related to the annealing temperature are systematically extracted. Increases in the refractive index n and extinction coefficient k, with increasing annealing temperature are observed due to the formation of more closely packed thin films and the enhancement of scattering effect in the targeted HfO₂ film. Change of the complex dielectric function and reduction of optical band gap with an increase in annealing temperature are discussed. The extracted direct band gap related to the structure varies from 5.77, 5.65, and 5.56 eV for the as-deposited and annealed thin films at 700 and 800 °C, respectively. It has been found from the C-V measurement the decrease of accumulation capacitance values upon annealing, which can be contributed to the growth of the interfacial layer with lower dielectric constant upon postannealing. The flat-band voltage shifts negatively due to positive charge generated during postannealing.     

The interface reaction of high-k La2Hf2O7/Si thin film grown by pulsed laser deposition

The La₂Hf₂O₇ films have been deposited on Si (1 0 0) substrate by using pulsed laser deposition (PLD) method. X-ray diffraction (XRD) demonstrates that the as-grown film is amorphous and crystallizes after 1000 °C annealing. The interface structure is systematically studied by Synchrotron X-ray reflectivity (XRR), Fourier transform infrared (FTIR) and X-ray photoelectron spectroscopy (XPS). Silicide, silicate and SiO_x formations from interfacial reaction are observed on the surface of the Si substrate in the as-grown film. The impact of silicide formation on the electrical properties is revealed by capacitance-voltage (C-V) measurements. By post-deposition annealing (PDA), silicide can be effectively eliminated and C-V property is obviously improved.     

Current transport mechanism in Al/Si3N4/p-Si (MIS) Schottky barrier diodes at low temperatures

The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (Al/Si₃N₄/p-Si) Schottky barrier diodes (SBDs) were measured in the temperature range of 80-300 K. By using the thermionic emission (TE) theory, the zero-bias barrier height Φ_B0 calculated from I-V characteristics was found to increase with increasing temperature. Such temperature dependence is an obvious disagreement with the negative temperature coefficient of the barrier height calculated from C-V characteristics. Also, the ideality factor decreases with increasing temperature, and especially the activation energy plot is nonlinear at low temperatures. Such behaviour is attributed to Schottky barrier inhomogeneties by assuming a Gaussian distribution of barrier heights (BHs) at interface. We attempted to draw a Φ_B0 versus q/2kT plot to obtain evidence of a Gaussian distribution of the BHs, and the values of Φ_Bo = 0.826 eV and α_o = 0.091 V for the mean barrier height and standard deviation at zero-bias, respectively, have been obtained from this plot. Thus, a modified ln(I_o/T²) − q²σ_o²/2(kT)² versus q/kT plot gives Φ_B0 and Richardson constant A^* as 0.820 eV and 30.273 A/cm² K², respectively, without using the temperature coefficient of the barrier height. This value of the Richardson constant 30.273 A/cm² K² is very close to the theoretical value of 32 A/cm² K² for p-type Si. Hence, it has been concluded that the temperature dependence of the forward I-V characteristics of the Al/Si₃N₄/p-Si Schottky barrier diodes can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights. In addition, the temperature dependence of energy distribution of interface state density (N_SS) profiles was determined from the forward I-V measurements by taking into account the bias dependence of the effective barrier height and ideality factor.     

Hf1−xSixOy dielectric films deposited by UV-photo-induced chemical vapour deposition (UV-CVD)

Hf_1−xSi_xO_y is an attractive candidate material for high-k dielectrics. We report in this work the deposition of ultra-thin Hf_1−xSi_xO_y films (0.1 ≤ x ≥ 0.6) on silicon substrate at 450 °C by UV-photo-induced chemical vapour deposition (UV-CVD) using 222 nm excimer lamps. Silicon(IV) and hafnium(IV) organic compounds were used as the precursors. Films from around 5 to 40 nm in thickness with refractive indices from 1.782 to 1.870 were grown. The deposition rate was found to be of 6 nm/min at a temperature of 450 °C. The physical, interfacial and electrical properties of hafnium silicate (Hf_1−xSi_xO_y) thin films were investigated by using X-ray photoelectron spectroscopy, ellipsometry, FT-IR, C-V and I-V measurements. XRD showed that they were basically amorphous, while Fourier transform infrared spectroscopy (FT-IR), clearly revealed Hf-O-Si absorption in the photo-CVD deposited Hf_1−xSi_xO_y films. Surface and interfacial properties were analysed by TEM and XPS. It is found that carbon content in the films deposited by UV-CVD is very low and it also decreases with increasing Si/(Si + Hf) ratio, as low as about 1 at.% at the Si/(Si + Hf) ratio of 60 at.%.     

The influence of the substrate temperature on the photovoltaic properties of spray-deposited CdS:In thin films

Polycrystalline and highly transparent CdS:In thin films were produced by the spray pyrolysis (SP) technique at different substrate temperatures ranging from 350 to 490 °C on glass substrates. The effect of the substrate temperature on the photovoltaic properties of the films was investigated by studying the transmittance measurements, X-ray diffraction (XRD) patterns, scanning electron microscope (SEM) observations and the I-V plots. The transmittance measurements were used to estimate the band gap energy by the linear fit of (αhν)² versus hν. The band gap energy was found to be slightly increasing with the substrate temperature. XRD diffractograms show that a phase transition from the cubic to the hexagonal phase occurs by increasing the substrate temperature, beside more orientation of crystal growth. Also they show that complex cadmium compounds are still present till T_s ≈ 460 °C after which they practically disappear. From the linear I-V plots the resistivity was estimated and found to be strongly decreasing with the substrate temperature.     

Effect of deposition conditions on YBa2Cu3O7−δ thin films by inverted cylindrical magnetron sputtering and substrate effects

The dependence of YBCO thin film properties on the deposition conditions was studied for different substrates. The deposition conditions were optimized for the epitaxial growth of high quality YBCO thin films of 1500 Å thickness onto single crystal (100-oriented) SrTiO₃ (STO), MgO and LaAlO₃ (LAO) substrates by DC Inverted Cylindrical Magnetron Sputtering (ICMS). The samples were investigated in detail by means of X-ray diffraction analysis (XRD), EDX, AFM, ρ-T, magnetic susceptibility and current-voltage (I-V) characterizations. The samples show strong diamagnetic behavior and sharp transition temperatures of 89-91 K with ΔT<0.5 K. XRD of the samples exhibited highly c-axis orientation. The full width at half maximum (FWHM) values of the rocking curves were ranging typically from 0.22 to 0.28°. The samples have smooth surfaces as shown from AFM micrographs. The surface roughness, R_a, changed between 5-7 nm. I-V characteristics were obtained from the 20 μm-wide microbridges, which were patterned by a laser writing technique. The critical current densities (J_c, 1.06×10⁶ for LAO-based YBCO, 1.39×10⁶ for MgO-based YBCO, 1.67×10⁶ A/cm² for STO based YBCO) of the microbridges were evaluated from I-V curves at 77 K.     

Current conduction mechanism in Al/p-Si Schottky barrier diodes with native insulator layer at low temperatures

The forward bias current-voltage (I-V) characteristics of Al/p-Si (MS) Schottky diodes with native insulator layer were measured in the temperature range of 80-300 K. The obtained zero bias barrier height Φ_B0(I-V), ideality factor (n) and series resistance (R_s) determined by using thermionic emission (TE) mechanism show strong temperature dependence. There is a linear correlation between the Φ_B0(I-V) and n because of the inhomogeneties in the barrier heights (BHs). Calculated values from temperature dependent I-V data reveal an unusual behaviour such that the Φ_B0 decreases, as the n and R_s values are increasing with decreasing absolute temperature, and these changes are more pronounced especially at low temperatures. Such temperature dependence of BH is contradictory with the reported negative temperature coefficient of the barrier height. In order to explain this behaviour we have reported a modification in the expression reverse saturation current I_o including the n and the tunnelling factor (αΧ^1/2δ) estimated to be 15.5. Therefore, corrected effective barrier height Φ_bef.(I-V) versus temperature has a negative temperature coefficients (α = −2.66 × 10⁻⁴ eV/K) and it is in good agreement with negative temperature coefficients (α = −4.73 × 10⁻⁴ eV/K) of Si band gap. In addition, the temperature dependent energy distribution of interface states density N_ss profiles was obtained from the forward bias I-V measurements by taking into account the bias dependence of the Φ_e and n. The forward bias I-V characteristics confirm that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that the current conduction mechanism of MS Schottky diodes.     

The dependence of barrier height on temperature for Pd Schottky contacts on ZnO

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements have been performed on Pd/ZnO Schottky barrier diodes in the range 60-300 K. The room temperature values for the zero bias barrier height from the I-V measurements (Φ_I-V) was found to be 0.52 eV and from the C-V measurements (Φ_C-V) as 3.83 eV. From the temperature dependence of forward bias I-V, the barrier height was observed to increase with temperature, a trend that disagrees with the negative temperature coefficient for semiconductor material. The C-V barrier height decreases with temperature, a trend that is in agreement with the negative temperature coefficient of semiconductor material. This has enabled us to fit two curves in two regions (60-120 K and 140-300 K). We have attributed this behaviour to a defect observed by DLTS with energy level 0.31 eV below the conduction band and defect concentration of between 4×10¹⁶ and 6×10¹⁶ cm⁻³ that traps carriers, influencing the determination of the barrier height.     

Molecular control over Ag/p-Si diode by organic layer

Electrical transport properties of Ag metal-fluorescein sodium salt (FSS) organic layer-silicon junction have been investigated. The current-voltage (I-V) characteristics of the diode show rectifying behavior consistent with a potential barrier formed at the interface. The diode indicates a non-ideal I-V behavior with an ideality factor higher than unity. The ideality factor of the Ag/FSS/p-Si diode decreases with increasing temperature and the barrier height increases with increasing temperature. The barrier height (φ_b=0.98 eV) obtained from the capacitance-voltage (C-V) curve is higher than barrier height (φ_b=0.72 eV) derived from the I-V measurements. The barrier height of the Ag/FSS/p-Si Schottky diode at the room temperature is significantly larger than that of the Ag/p-Si Schottky diode. It is evaluated that the FSS organic layer controls electrical charge transport properties of Ag/p-Si diode by excluding effects of the SiO₂ residual oxides on the hybrid diode.     

Electrical characteristics of polycrystalline Si layers embedded into high-k Al2O3 gate layers

The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al₂O₃ (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al₂O₃ layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.     

Thermal stability study of palladium and cobalt Schottky contacts on n-Ge (1 0 0) and defects introduced during contacts fabrication and annealing process

Palladium (Pd) and cobalt (Co) Schottky barrier diodes were fabricated on n-Ge (1 0 0). The Pd-Schottky contacts were deposited by resistive evaporation while the Co-contacts were deposited by resistive evaporation and electron beam deposition. Current-voltage (I-V), capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements were performed on as-deposited and annealed samples. Electrical properties of Pd and Co samples annealed between 30 and 600 °C indicate the formation of one phase of palladium germanide and two phases of cobalt germanide. No defects were observed for the resistively evaporated as-deposited Pd-and Co-Schottky contacts. A hole trap at 0.33 eV above the valence band was observed on the Pd-Schottky contacts after annealing at 300 °C. An electron trap at 0.37 eV below the conduction band and a hole trap at 0.29 eV above the valence band was observed on as-deposited Co-electron beam deposited Schottky contacts. Rutherford back scattering (RBS) technique was also used to characterise the Co-Ge, for as-deposited and annealed samples.