Fabrication and electrical characterization of Schottky diode based on 2-amino-4, 5-imidazoledicarbonitrile (AIDCN)

The junction characteristics of the organic compound 2-amino-4, 5-imidazoledicarbonitrile (AIDCN) on p-type silicon substrate are studied in detail. AIDCN is deposited on silicon substrate using thermal evaporator. Current–voltage (I–V) characteristic of the device is measured at room temperature. The Au/AIDCN/p-Si device shows non-linear I–V characteristic with rectification ratio of 7.2×10³ at 5 V. The electronic device parameters such as barrier height, ideality factor, and series resistance are calculated using I–V data and observed to be 0.74 eV, 3.00, and 3.73×10⁴ Ω respectively.     

Effects of ageing on the electrical characteristics of Cd/CdS/n-Si/Au–Sb structure deposited by SILAR method

Cd/CdS/n-Si/Au–Sb structure has been fabricated by the Successive Ionic Layer Adsorption and Reaction (SILAR) method and the influence of the time dependent or ageing on the characteristic parameters are examined. The current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) characteristics of the structure have been measured immediately, 1, 3, 5, 15, 30, 45, 60, 75, 90, 105, 120, 135, 150 and 165 days after fabrication of the structure. The characteristic parameters of the structure such as barrier height, ideality factor, series resistance are calculated from the I–V measurements and the barrier height, carrier concentration values are calculated from reverse bias C^?2–V measurements at 500 kHz and room temperature. Furthermore, the density distribution and time constant of the interface states have been calculated from the C–f measurements using the Schottky Capacitance Spectroscopy method as a function of ageing time. It has been seen that the changes of characteristic parameters such as barrier height, ideality factor and series resistance of Cd/CdS/n-Si/Au–Sb structure have lightly changed with increasing ageing time. At the same time, the rectifying ratio of the device increases with ageing time. It can be clearly said that the I–V characteristics of device get better with time.     

Influence of rapid thermal annealing on electrical and structural properties of double metal structure Au/Ni/n-InP (1 1 1) diodes

The effect of rapid thermal annealing on the electrical and structural properties of Ni/Au Schottky contacts on n-InP have been investigated by current–voltage (I–V), capacitance–voltage (C–V), auger electron spectroscopy (AES) and X-ray diffraction (XRD) techniques. The Au/Ni/n-InP Schottky contacts are rapid thermally annealed in the temperature range of 200–500 °C for a duration of 1 min. The Schottky barrier height of as-deposited Ni/Au Schottky contact has been found to be 0.50 eV (I–V) and 0.86 eV (C–V), respectively. It has been found that the Schottky barrier height decreased with increasing annealing temperature as compared to as-deposited sample. The barrier height values obtained are 0.43 eV (I–V), 0.72 eV (C–V) for the samples annealed at 200 °C, 0.45 eV (I–V) and 0.73 eV (C–V) for those at 400 °C. Further increase in annealing temperature to 500 °C the barrier height slightly increased to 0.46 eV (I–V) and 0.78 eV (C–V) compared to the values obtained for the samples annealed at 200 °C and 400 °C. AES and XRD studies showed the formation of indium phases at the Ni/Au and InP interface and may be the reason for the increase in barrier height. The AFM results showed that there is no significant degradation in the surface morphology (rms roughness of 1.56 nm) of the contact even after annealing at 500 °C.     

Scanning tunneling microscope study of nanosized metal–semiconductor contacts between ErSi2 nanoislands and Si(0 0 1) substrate

The current–voltage (I–V) characteristics of the nanosized metal–semiconductor contacts formed between the epitaxially grown ErSi₂ islands and p-Si(0 0 1) substrate are measured in situ by the scanning tunneling microscope. Experimental results show that the current densities passing through the nanocontacts are five orders of magnitude larger than that of the macroscopic ones and have an obvious dependence on the contact area. Especially, it is found that I–V characteristics of the contacts are sensitive to the sample surface adsorption. Our investigations indicate that surface conduction plays an important role in the electrical transport process from ErSi₂ islands to the Si(0 0 1) substrate. Furthermore, for the nanocontacts with surface currents suppressed effectively, the ideality factor and the effective Schottky barrier height are estimated by using the standard thermionic emission model. Our analysis suggests that the current through the interface between ErSi₂ nanoislands and the p-Si(0 0 1) substrate is enhanced due to the effects of tunneling and image force lowering.     

Molecular control over Ag/p-Si diode by organic layer

Electrical transport properties of Ag metal-fluorescein sodium salt (FSS) organic layer-silicon junction have been investigated. The current-voltage (I-V) characteristics of the diode show rectifying behavior consistent with a potential barrier formed at the interface. The diode indicates a non-ideal I-V behavior with an ideality factor higher than unity. The ideality factor of the Ag/FSS/p-Si diode decreases with increasing temperature and the barrier height increases with increasing temperature. The barrier height (φ_b=0.98 eV) obtained from the capacitance-voltage (C-V) curve is higher than barrier height (φ_b=0.72 eV) derived from the I-V measurements. The barrier height of the Ag/FSS/p-Si Schottky diode at the room temperature is significantly larger than that of the Ag/p-Si Schottky diode. It is evaluated that the FSS organic layer controls electrical charge transport properties of Ag/p-Si diode by excluding effects of the SiO₂ residual oxides on the hybrid diode.     

Effect of series resistance on the performance of silicon Schottky diode in the presence of tin oxide layer

The current–voltage (I–V) characteristics of Al/SnO₂/p-Si (MIS) Schottky diodes prepared by means of spray deposition method have been measured at 80, 295 and 350 K. In order to interpret the experimentally observed non-ideal Al/SnO₂/p-Si Schottky diode parameters such as, the series resistance R_s, barrier height Φ_B and ideality factor n, a novel calculation method has been reported by taking into account the applied voltage drop across interfacial oxide layer V_i and ideality factor n in the current transport mechanism. The values obtained for V_i were subtracted from the applied voltage values V and then the values of R_s were recalculated. The parameters obtained by accounting for the voltage drop V_i have been compared with those obtained without considering the above voltage drop. It is shown that the values of R_s estimated from Cheung’s method were strongly temperature-dependent and decreased with increasing temperature. It is shown that the voltage drop across the interfacial layer will increase the ideality factor and the voltage dependence of the I–V characteristics. The interface state density N_ss of the diodes has an exponential growth with bias towards the top of the valance band for each temperature; for example, from 2.37 × 10¹³ eV⁻¹ cm⁻² in 0.70−E_v eV to 7.47 × 10¹³ eV⁻¹ cm⁻² in 0.62−E_v eV for 295 K. The mean N_ss estimated from the I–V measurements decreased with increasing the temperature from 8.29 × 10¹³ to 2.20 × 10¹³ eV⁻¹ cm⁻².     

Electrical properties and conduction mechanism of an organic-modified Au/NiPc/n-InP Schottky barrier diode

The effect of nickel phthalocyanine (NiPc) organic interlayer on the electronic parameters of Au/n-InP Schottky contacts has been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements. Measurements showed that the barrier heights and ideality factors are 0.58 eV (I–V), 0.69 eV(C–V) and 1.32 for Au/n-InP Schottky contact and 0.80 eV (I–V), 1.12 eV (C–V) and 1.73 for Au/NiPc/n-InP Schottky contact, respectively. Experimental results show that the interfacial layer of NiPc increases the effective barrier height by the influence of the space charge region of the Au/n-InP Schottky junction. Further, Cheung’s and modified Norde functions are used to extract the barrier height, series resistance and ideality factors. The discrepancy between barrier heights estimated from I–V to C–V methods is also explained. Moreover, the energy distribution of interface state density is determined from the forward bias I–V data. Results show that the interface states and series resistance play an important role on electrical properties of the structures studied. The reverse leakage current conduction mechanism is investigated. Results reveal that the Schottky conduction mechanism is found to be dominant in the Au/n-InP Schottky contact. However, in the case of Au/NiPc/n-InP Schottky contact, the Schottky conduction mechanism is found to be dominant in the higher bias region, while Poole–Frenkel conduction is found to be dominant in the lower bias region.     

Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes

In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R_S), the ideality factor (n) and the barrier height (Φ_b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (Φ_b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R_S) between 12.594 and 12.950 kΩ. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.     

Current–voltage characteristics of Al/Rhodamine-101/n-GaAs structures in the wide temperature range

The forward bias current–voltage (I–V) characteristics of Al/Rhodamine-101/n-GaAs structure have been investigated in the temperature range of 80–350 K. It has been seen a decrease in ideality factor (n) and an increase in the zero-bias barrier height (BH) with an increase in temperature. It has been seen that such a behavior of the BH and n obey Gaussian distribution of the BHs due to the BH inhomogeneities at the metal/semiconductor (MS) interface. The very strong temperature dependence of ideality factor of the structure has shown that the current processes occurring in the organic layer at the MS interface would be a possible candidate such as trap-charge limited conduction in determining the current at the intermediate and high bias regimes. Furthermore, it has been show that the Rh101 can be used to vary effective BHs for the metal/GaAs Schottky diodes. As a result, it has been determined that the BH value for conventional Al/n-GaAs SBD is remarkably higher than our own values of 0.68 eV obtained for the Al/Rh101/n-GaAs at 290 K.     

Effect of diode size and series resistance on barrier height and ideality factor in nearly ideal Au/n type-GaAs micro Schottky contact diodes

Small high-quality Au/n type-GaAs Schottky barrier diodes (SBDs) with low reverse leakage current are produced using lithography. Their effective barrier heights (BHs) and ideality factors from current-voltage (I-V) characteristics are measured by a Pico ampere meter and home-built I-V instrument. In spite of the identical preparation of the diodes there is a diode-to-diode variation in ideality factor and barrier height parameters. Measurement of topology of a surface of a thin metal film with atomic force microscope (AFM) shows that Au-n type-GaAS SD consists of a set of parallel-connected micro and nanocontacts diodes with sizes approximately in a range of 100-200 nm. Between barrier height and ideality factor there is an inversely proportional dependency. With the diameter of contact increasing from 5 μm up to 200 μm, the barrier height increases from 0.833 up to 0.933 eV and its ideality factor decreases from 1.11 down to 1.006. These dependencies show the reduction of the contribution of the peripheral current with the diameter of contact increasing. We find the effect of series resistance on barrier height and ideality factor.     

Effect of annealing temperature on the electrical properties of Au/Ta2O5/n-GaN metal–insulator–semiconductor (MIS) structure

We report on the effect of an annealing temperature on the electrical properties of Au/Ta₂O₅/n-GaN metal–insulator–semiconductor (MIS) structure by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The measured Schottky barrier height (Φ _bo) and ideality factor n values of the as-deposited Au/Ta₂O₅/n-GaN MIS structure are 0.93 eV (I–V) and 1.19. The barrier height (BH) increases to 1.03 eV and ideality factor decreases to 1.13 upon annealing at 500 ^°C for 1 min under nitrogen ambient. When the contact is annealed at 600 ^°C, the barrier height decreases and the ideality factor increases to 0.99 eV and 1.15. The barrier heights obtained from the C–V measurements are higher than those obtained from I–V measurements, and this indicates the existence of spatial inhomogeneity at the interface. Cheung’s functions are also used to calculate the barrier height (Φ _bo), ideality factor (n), and series resistance (R _s ) of the Au/Ta₂O₅/n-GaN MIS structure. Investigations reveal that the Schottky emission is the dominant mechanism and the Poole–Frenkel emission occurs only in the high voltage region. The energy distribution of interface states is determined from the forward bias I–V characteristics by taking into account the bias dependence of the effective barrier height. It is observed that the density value of interface states for the annealed samples with interfacial layer is lower than that of the density value of interface states of the as-deposited sample.     

The effects of annealing on Au/pyronine-B/MD n-InP Schottky structure

Thin film of non-polymeric organic compound pyronine-B has been fabricated on moderately doped (MD) n-InP substrate as an interfacial layer using spin coating technique for the electronic modification of Au/MD n-InP Schottky contact. The electrical characteristics have been determined at room temperature. The barrier height and the ideality factor values for Au/pyronine-B/MD n-InP Schottky diode have been obtained from the forward bias I-V characteristics at room temperature as 0.60 eV and 1.041; 0.571 and 1.253 eV after annealing at 100 and 250 °C, respectively. An increase in annealing temperature at the Au/n-InP Schottky junction is shown to increase the reverse bias leakage current by about one order of magnitude and decrease the Schottky barrier height by 0.027 eV. Furthermore, the barrier height values for the Au/pyronine-B/MD n-InP Schottky diode have also been obtained from the C-V characteristics at room temperature as 1.001 and 0.709 eV after annealing at 100 and 250 °C, respectively. Finally, it was seen that the diode parameters changed with increase in the annealing temperature.     

Effect of annealing on the electronic parameters of Au/poly(ethylmethacrylate)/n-InP Schottky diode with organic interlayer

A thin poly(ethylmethacrylate) (PEMA) layer is deposited on n-InP as an interlayer for electronic modification of Au/n-InP Schottky structure. The electrical properties of Au/PEMA/n-InP Schottky diode have been investigated by current–voltage (I–V) and capacitance–voltage (C–V) measurements at different annealing temperatures. Experimental results show that Au/PEMA/n-InP structure exhibit a good rectifying behavior. An effective barrier height as high as 0.83 eV (I–V) and 1.09 eV (C–V) is achieved for the Au/PEMA/n-InP Schottky structure after annealing at 150 °C compared to the as-deposited and annealed at 100 and 200 °C. Modified Norde's functions and Cheung method are also employed to calculate the barrier height, series resistance and ideality factors. Results show that the barrier height increases upon annealing at 150 °C and then slightly decreases after annealing at 200 °C. The PEMA layer increases the effective barrier height of the structure as this layer creates a physical barrier between the Au metal and the n-InP. Terman's method is used to determine the interface state density and it is found to be 5.141 × 10¹² and 4.660 × 10¹² cm^?2 eV^?1 for the as-deposited and 200 °C annealed Au/PEMA/n-InP Schottky diodes. Finally, it is observed that the Schottky diode parameters change with increasing annealing temperature.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.     

Improved electrical parameters of vacuum annealed Ni/4H-SiC (0 0 0 1) Schottky barrier diode

The reported work has been focused on the improvement of electrical parameters of Schottky diode using vacuum annealing at mild temperature in Ar gas ambient. Nickel Schottky barrier diodes were fabricated on 50 μm epitaxial layer of n-type 4H-SiC (0 0 0 1) substrate. The values of leakage current, Schottky barrier height (?_B), ideality factor (η) and density of interface states (N_SS) were obtained from experimentally measured current–voltage (I–V) and capacitance–voltage (C–V) characteristics before and after vacuum annealing treatment. The data revealed that ?_B, η and reverse leakage current for the as-processed diodes are 1.25 eV, 1.6 and 1.2 nA (at ?100 V), respectively, while for vacuum annealed diodes these parameters are 1.36 eV, 1.3 and 900 pA (at same reverse voltage). Improved characteristics have been resulted under the influence of vacuum annealing because of lesser number of minority carrier generation due to incessant reduction of number of available discrete energy levels in the bandgap of 4H-SiC substrate and lesser number of interface states density at Ni/4H-SiC (0 0 0 1) interface.     

Study of Schottky contact between Au and NiO nanowire by conductive atomic force microscopy (C-AFM): The case of surface states

In this work, NiO nanowires have been synthesized by a hydrothermal reaction of NiCl₂ with Na₂C₂O₄ in the presence of ethylene glycol at 180 °C for 12 h, then calcinated at 400 °C for 2 h. The NiO nanowires were analyzed by means of scanning electron microscope (SEM), atomic force microscope (AFM), X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS). The resulting current–voltage (I–V) characteristics of the NiO nanowires exhibited a clear rectifying behavior. This rectify behavior was attributed to the formation of a Schottky contact between Au coated atomic force microscopy (AFM) tip and NiO nanowires (nano-M/SC) which was dominated by the surface states in NiO itself. Photo-assisted conductive AFM (PC-AFM) was used to demonstrate how the I–V characteristics are influenced by the surface states. Our I–V results also showed that the nano-M/SCs had a good photoelectric switching effect at reverse bias.     

Electrical characteristics of Pt/Au Schottky contacts to plasma-etched Al0.45Ga0.55N

The effects of inductively coupled plasma (ICP) etching on electrical properties of Pt/Au–Al_0.45Ga_0.55N Schottky contacts are investigated. There are two linear parts in the ln I–V curves of ICP-etched Schottky contacts at small forward currents at 198–298 K. Thermionic field emission (TFE) theory analysis shows that Schottky contact with ICP etching has much lower barrier height and higher tunnel transmission probability than that without ICP etching, which could be attributed to plasma damage introduced on the ICP-etched surface. The down linear part is probably connected to surface tunneling component originated from plasma-etched surface which joins Schottky area to Ohmic area.     

Forward and reverse bias current-voltage characteristics of Au/n-Si Schottky barrier diodes with and without SnO2 insulator layer

The effects of interfacial insulator layer, interface states (N_ss) and series resistance (R_s) on the electrical characteristics of Au/n-Si structures have been investigated using forward and reverse bias current-voltage (I-V) characteristics at room temperature. Therefore, Au/n-Si Schottky barrier diodes (SBDs) were fabricated as SBDs with and without insulator SnO₂ layer to explain the effect of insulator layer on main electrical parameters. The values of ideality factor (n), R_s and barrier height (Φ_Bo) were calculated from ln(I) vs. V plots and Cheung methods. The energy density distribution profile of the interface states was obtained from the forward bias I-V data by taking bias dependence of ideality factor, effective barrier height (Φ_e) and R_s into account for MS and MIS SBDs. It was found that N_ss values increase from at about mid-gap energy of Si to bottom of conductance band edge of both SBDs and the MIS SBD’s N_ss values are 5-10 times lower than those of MS SBD’s. An apparent exponential increase from the mid-gap towards the bottom of conductance band is observed for both SBDs’ (MS and MIS) interface states obtained without taking R_s into account.     

Direct-current piezoelectric nanogenerator based on p-Si/n-ZnO heterojunction

We have demonstrated a direct-current piezoelectric nanogenerator with a novel structure of p-Si/n-ZnO heterojunction. Low resistance p-type silicon chip, with a large number of nano-concaves on the surface, was utilized as a top electrode over the n-type ZnO nanorod arrays, forming a heterojunction nanogenerator. Piezoelectric current, with average singles about 1 nA, was generated from the heterojunction nanogenerator. Rectifying behavior of the p-Si/n-ZnO heterojunction in our piezoelectric nanogenerator was analyzed from the I–V curve and the energy band structure. Furthermore, output tests of reverse connection and two devices parallel connection clearly eliminate the effects from measurement system errors and confirms that the current is generated from the nanogenerator. Our research presents an approach to integrating a new type of nanogenerator using the silicon chip directly, without expensive Pt or Au coated on the electrode surfaces.