A novel analytical thermal model for multilevel nano-scale interconnects considering the via effect |
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| Authors: | Zhu Zhang-Ming Li Ru Hao Bao-Tian and Yang Yin-Tang |
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| Affiliation: | Microelectronics Institute, Xidian University, Xi'an 710071, China |
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| Abstract: | Based on the heat diffusion equation of multilevel
interconnects, a novel analytical thermal model for multilevel
nano-scale interconnects considering the via effect is presented,
which can compute quickly the temperature of multilevel
interconnects, with substrate temperature given. Based on the
proposed model and the 65~nm complementary metal oxide semiconductor
(CMOS) process parameter, the temperature of nano-scale
interconnects is computed. The computed results show that the via
effect has a great effect on local interconnects, but the reduction
of thermal conductivity has little effect on local interconnects.
With the reduction of thermal conductivity or the increase of
current density, however, the temperature of global interconnects
rises greatly, which can result in a great deterioration in their
performance. The proposed model can be
applied to computer aided design (CAD) of very large-scale
integrated circuits (VLSIs) in nano-scale technologies. |
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| Keywords: | multilevel interconnects temperature distribution self-heating via effect |
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